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Arrow Lake - E-Core Offcore Events

Microarchitectures

  • Intel® Microarchitecture Code Named Lion Cove (Performance Core)
  • Intel® Microarchitecture Code Named Skymont (Efficient Core)
  • Intel® Microarchitecture Code Named Crestmont (Low Power Efficient Core)

E-Core Offcore Events

Event Name Description Programming Info
OCR.FULL_STREAMING_WR.ANY_RESPONSE Counts streaming stores which modify a full 64 byte cacheline that have any type of response. EventSel=B7H UMask={01H,02H} MSR_OFFCORE_RSPx{1A6H,1A7H}=800000010000H
OCR.PARTIAL_STREAMING_WR.ANY_RESPONSE Counts streaming stores which modify only part of a 64 byte cacheline that have any type of response. EventSel=B7H UMask={01H,02H} MSR_OFFCORE_RSPx{1A6H,1A7H}=400000010000H
OCR.STREAMING_WR.ANY_RESPONSE Counts streaming stores that have any type of response. EventSel=B7H UMask={01H,02H} MSR_OFFCORE_RSPx{1A6H,1A7H}=10800H