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Ivy Bridge Client - Uncore Events

Microarchitectures

Uncore Events

Event Name Description Programming Info
UNC_ARB_COH_TRK_OCCUPANCY.ALL Cycles weighted by number of requests pending in Coherency Tracker. EventSel=83H UMask=01H Counter=0
UNC_ARB_COH_TRK_REQUESTS.ALL Number of requests allocated in Coherency Tracker. EventSel=84H UMask=01H Counter=0,1
UNC_ARB_TRK_OCCUPANCY.ALL Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC. EventSel=80H UMask=01H Counter=0
UNC_ARB_TRK_OCCUPANCY.CYCLES_OVER_HALF_FULL Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC. EventSel=80H UMask=01H Counter=0,1
UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC. EventSel=80H UMask=01H Counter=0,1
UNC_ARB_TRK_REQUESTS.ALL Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC. EventSel=81H UMask=01H Counter=0,1
UNC_ARB_TRK_REQUESTS.EVICTIONS Counts the number of LLC evictions allocated. EventSel=81H UMask=80H Counter=0,1
UNC_ARB_TRK_REQUESTS.WRITES Counts the number of allocated write entries, include full, partial, and LLC evictions. EventSel=81H UMask=20H Counter=0,1
UNC_CLOCK.SOCKET This 48-bit fixed counter counts the UCLK cycles. EventSel=00H UMask=01H Counter=Fixed
UNC_CBO_CACHE_LOOKUP.ANY_ES L3 Lookup any request that access cache and found line in E or S-state. EventSel=34H UMask=86H Counter=0,1
UNC_CBO_CACHE_LOOKUP.ANY_I L3 Lookup any request that access cache and found line in I-state. EventSel=34H UMask=88H Counter=0,1
UNC_CBO_CACHE_LOOKUP.ANY_M L3 Lookup any request that access cache and found line in M-state. EventSel=34H UMask=81H Counter=0,1
UNC_CBO_CACHE_LOOKUP.ANY_MESI L3 Lookup any request that access cache and found line in MESI-state. EventSel=34H UMask=8FH Counter=0,1
UNC_CBO_CACHE_LOOKUP.EXTSNP_ES L3 Lookup external snoop request that access cache and found line in E or S-state. EventSel=34H UMask=46H Counter=0,1
UNC_CBO_CACHE_LOOKUP.EXTSNP_I L3 Lookup external snoop request that access cache and found line in I-state. EventSel=34H UMask=48H Counter=0,1
UNC_CBO_CACHE_LOOKUP.EXTSNP_M L3 Lookup external snoop request that access cache and found line in M-state. EventSel=34H UMask=41H Counter=0,1
UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI L3 Lookup external snoop request that access cache and found line in MESI-state. EventSel=34H UMask=4FH Counter=0,1
UNC_CBO_CACHE_LOOKUP.READ_ES L3 Lookup read request that access cache and found line in E or S-state. EventSel=34H UMask=16H Counter=0,1
UNC_CBO_CACHE_LOOKUP.READ_I L3 Lookup read request that access cache and found line in I-state. EventSel=34H UMask=18H Counter=0,1
UNC_CBO_CACHE_LOOKUP.READ_M L3 Lookup read request that access cache and found line in M-state. EventSel=34H UMask=11H Counter=0,1
UNC_CBO_CACHE_LOOKUP.READ_MESI L3 Lookup read request that access cache and found line in any MESI-state. EventSel=34H UMask=1FH Counter=0,1
UNC_CBO_CACHE_LOOKUP.WRITE_ES L3 Lookup write request that access cache and found line in E or S-state. EventSel=34H UMask=26H Counter=0,1
UNC_CBO_CACHE_LOOKUP.WRITE_I L3 Lookup write request that access cache and found line in I-state. EventSel=34H UMask=28H Counter=0,1
UNC_CBO_CACHE_LOOKUP.WRITE_M L3 Lookup write request that access cache and found line in M-state. EventSel=34H UMask=21H Counter=0,1
UNC_CBO_CACHE_LOOKUP.WRITE_MESI L3 Lookup write request that access cache and found line in MESI-state. EventSel=34H UMask=2FH Counter=0,1
UNC_CBO_XSNP_RESPONSE.HIT_EVICTION A cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core. EventSel=22H UMask=84H Counter=0,1
UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL An external snoop hits a non-modified line in some processor core. EventSel=22H UMask=24H Counter=0,1
UNC_CBO_XSNP_RESPONSE.HIT_XCORE A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core. EventSel=22H UMask=44H Counter=0,1
UNC_CBO_XSNP_RESPONSE.HITM_EVICTION A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core. EventSel=22H UMask=88H Counter=0,1
UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL An external snoop hits a modified line in some processor core. EventSel=22H UMask=28H Counter=0,1
UNC_CBO_XSNP_RESPONSE.HITM_XCORE A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core. EventSel=22H UMask=48H Counter=0,1
UNC_CBO_XSNP_RESPONSE.MISS_EVICTION A cross-core snoop resulted from L3 Eviction which misses in some processor core. EventSel=22H UMask=81H Counter=0,1
UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL An external snoop misses in some processor core. EventSel=22H UMask=21H Counter=0,1
UNC_CBO_XSNP_RESPONSE.MISS_XCORE A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core. EventSel=22H UMask=41H Counter=0,1