Lunar Lake Client - Uncore Events
Microarchitectures
- Intel® Microarchitecture Code Named Lion Cove (Performance Core)
- Intel® Microarchitecture Code Named Skymont (Efficient Core)
Uncore Events
| Event Name | Description | Programming Info |
|---|---|---|
| UNC_CLOCK.SOCKET | This 48-bit fixed counter counts the UCLK cycles. | MSR_UNC_PERF_FIXED_CTR Fixed |
| UNC_M_CAS_COUNT_RD | Read CAS command sent to DRAM | EventSel=22H UMask=00H Counter=0,1,2,3,4 |
| UNC_M_CAS_COUNT_WR | Write CAS command sent to DRAM | EventSel=23H UMask=00H Counter=0,1,2,3,4 |
| UNC_M_TOTAL_DATA | Total number of read and write byte transfers to/from DRAM, in 32B chunk, per DDR channel. Counter increments by 1 after sending or receiving 32B chunk data. | EventSel=3CH UMask=00H Counter=0,1,2,3,4 |