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Skylake Server

Microarchitectures

Offcore Events

Event Name Description Programming Info
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=ANY_RESPONSE Counts demand data reads that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_HIT.NO_SNOOP_NEEDED Counts demand data reads that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts demand data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_HIT.HITM_OTHER_CORE Counts demand data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_HIT.ANY_SNOOP Counts demand data reads that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_MISS.ANY_SNOOP Counts demand data reads that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_MISS.REMOTE_HIT_FORWARD Counts demand data reads that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_MISS.REMOTE_HITM Counts demand data reads that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts demand data reads that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts demand data reads that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800001H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts demand data reads that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000001H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=ANY_RESPONSE Counts all demand data writes (RFOs) that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_HIT.NO_SNOOP_NEEDED Counts all demand data writes (RFOs) that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all demand data writes (RFOs) that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_HIT.HITM_OTHER_CORE Counts all demand data writes (RFOs) that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_HIT.ANY_SNOOP Counts all demand data writes (RFOs) that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_MISS.ANY_SNOOP Counts all demand data writes (RFOs) that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_MISS.REMOTE_HIT_FORWARD Counts all demand data writes (RFOs) that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_MISS.REMOTE_HITM Counts all demand data writes (RFOs) that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all demand data writes (RFOs) that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand data writes (RFOs) that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800002H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand data writes (RFOs) that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000002H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=ANY_RESPONSE Counts all demand code reads that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_HIT.NO_SNOOP_NEEDED Counts all demand code reads that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all demand code reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_HIT.HITM_OTHER_CORE Counts all demand code reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_HIT.ANY_SNOOP Counts all demand code reads that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_MISS.ANY_SNOOP Counts all demand code reads that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_MISS.REMOTE_HIT_FORWARD Counts all demand code reads that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_MISS.REMOTE_HITM Counts all demand code reads that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all demand code reads that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand code reads that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800004H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand code reads that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000004H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=ANY_RESPONSE Counts prefetch (that bring data to L2) data reads that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_HIT.NO_SNOOP_NEEDED Counts prefetch (that bring data to L2) data reads that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts prefetch (that bring data to L2) data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_HIT.HITM_OTHER_CORE Counts prefetch (that bring data to L2) data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_HIT.ANY_SNOOP Counts prefetch (that bring data to L2) data reads that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_MISS.ANY_SNOOP Counts prefetch (that bring data to L2) data reads that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_MISS.REMOTE_HIT_FORWARD Counts prefetch (that bring data to L2) data reads that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_MISS.REMOTE_HITM Counts prefetch (that bring data to L2) data reads that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts prefetch (that bring data to L2) data reads that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts prefetch (that bring data to L2) data reads that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800010H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts prefetch (that bring data to L2) data reads that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000010H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=ANY_RESPONSE Counts all prefetch (that bring data to L2) RFOs that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_HIT.NO_SNOOP_NEEDED Counts all prefetch (that bring data to L2) RFOs that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all prefetch (that bring data to L2) RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_HIT.HITM_OTHER_CORE Counts all prefetch (that bring data to L2) RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_HIT.ANY_SNOOP Counts all prefetch (that bring data to L2) RFOs that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_MISS.ANY_SNOOP Counts all prefetch (that bring data to L2) RFOs that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_MISS.REMOTE_HIT_FORWARD Counts all prefetch (that bring data to L2) RFOs that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_MISS.REMOTE_HITM Counts all prefetch (that bring data to L2) RFOs that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to L2) RFOs that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to L2) RFOs that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800020H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to L2) RFOs that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000020H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=ANY_RESPONSE Counts all prefetch (that bring data to LLC only) data reads that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_HIT.NO_SNOOP_NEEDED Counts all prefetch (that bring data to LLC only) data reads that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all prefetch (that bring data to LLC only) data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_HIT.HITM_OTHER_CORE Counts all prefetch (that bring data to LLC only) data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_HIT.ANY_SNOOP Counts all prefetch (that bring data to LLC only) data reads that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_MISS.ANY_SNOOP Counts all prefetch (that bring data to LLC only) data reads that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_MISS.REMOTE_HIT_FORWARD Counts all prefetch (that bring data to LLC only) data reads that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_MISS.REMOTE_HITM Counts all prefetch (that bring data to LLC only) data reads that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to LLC only) data reads that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to LLC only) data reads that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800080H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to LLC only) data reads that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000080H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=ANY_RESPONSE Counts all prefetch (that bring data to LLC only) RFOs that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_HIT.NO_SNOOP_NEEDED Counts all prefetch (that bring data to LLC only) RFOs that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all prefetch (that bring data to LLC only) RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_HIT.HITM_OTHER_CORE Counts all prefetch (that bring data to LLC only) RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_HIT.ANY_SNOOP Counts all prefetch (that bring data to LLC only) RFOs that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_MISS.ANY_SNOOP Counts all prefetch (that bring data to LLC only) RFOs that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_MISS.REMOTE_HIT_FORWARD Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_MISS.REMOTE_HITM Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800100H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch (that bring data to LLC only) RFOs that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000100H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=ANY_RESPONSE Counts L1 data cache hardware prefetch requests and software prefetch requests that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_HIT.NO_SNOOP_NEEDED Counts L1 data cache hardware prefetch requests and software prefetch requests that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts L1 data cache hardware prefetch requests and software prefetch requests that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_HIT.HITM_OTHER_CORE Counts L1 data cache hardware prefetch requests and software prefetch requests that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_HIT.ANY_SNOOP Counts L1 data cache hardware prefetch requests and software prefetch requests that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_MISS.ANY_SNOOP Counts L1 data cache hardware prefetch requests and software prefetch requests that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_MISS.REMOTE_HIT_FORWARD Counts L1 data cache hardware prefetch requests and software prefetch requests that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_MISS.REMOTE_HITM Counts L1 data cache hardware prefetch requests and software prefetch requests that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts L1 data cache hardware prefetch requests and software prefetch requests that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts L1 data cache hardware prefetch requests and software prefetch requests that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800400H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts L1 data cache hardware prefetch requests and software prefetch requests that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000400H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=ANY_RESPONSE Counts all prefetch data reads that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_HIT.NO_SNOOP_NEEDED Counts all prefetch data reads that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all prefetch data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_HIT.HITM_OTHER_CORE Counts all prefetch data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_HIT.ANY_SNOOP Counts all prefetch data reads that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_MISS.ANY_SNOOP Counts all prefetch data reads that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_MISS.REMOTE_HIT_FORWARD Counts all prefetch data reads that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_MISS.REMOTE_HITM Counts all prefetch data reads that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all prefetch data reads that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch data reads that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800490H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all prefetch data reads that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000490H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=ANY_RESPONSE Counts prefetch RFOs that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_HIT.NO_SNOOP_NEEDED Counts prefetch RFOs that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts prefetch RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_HIT.HITM_OTHER_CORE Counts prefetch RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_HIT.ANY_SNOOP Counts prefetch RFOs that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_MISS.ANY_SNOOP Counts prefetch RFOs that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_MISS.REMOTE_HIT_FORWARD Counts prefetch RFOs that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_MISS.REMOTE_HITM Counts prefetch RFOs that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts prefetch RFOs that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts prefetch RFOs that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800120H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts prefetch RFOs that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000120H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=ANY_RESPONSE Counts all demand & prefetch data reads that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_HIT.NO_SNOOP_NEEDED Counts all demand & prefetch data reads that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all demand & prefetch data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_HIT.HITM_OTHER_CORE Counts all demand & prefetch data reads that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_HIT.ANY_SNOOP Counts all demand & prefetch data reads that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_MISS.ANY_SNOOP Counts all demand & prefetch data reads that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_MISS.REMOTE_HIT_FORWARD Counts all demand & prefetch data reads that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_MISS.REMOTE_HITM Counts all demand & prefetch data reads that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all demand & prefetch data reads that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand & prefetch data reads that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800491H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand & prefetch data reads that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000491H
OFFCORE_RESPONSE:request=ALL_RFO: response=ANY_RESPONSE Counts all demand & prefetch RFOs that have any response type. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_HIT.NO_SNOOP_NEEDED Counts all demand & prefetch RFOs that hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=1003C0122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_HIT.HIT_OTHER_CORE_NO_FWD Counts all demand & prefetch RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=4003C0122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_HIT.HITM_OTHER_CORE Counts all demand & prefetch RFOs that hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=10003C0122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_HIT.ANY_SNOOP Counts all demand & prefetch RFOs that hit in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3F803C0122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_MISS.ANY_SNOOP Counts all demand & prefetch RFOs that miss in the L3. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=3FBC000122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_MISS.REMOTE_HIT_FORWARD Counts all demand & prefetch RFOs that miss the L3 and clean or shared data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=83FC00122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_MISS.REMOTE_HITM Counts all demand & prefetch RFOs that miss the L3 and the modified data is transferred from remote cache. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=103FC00122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_MISS.SNOOP_MISS_OR_NO_FWD Counts all demand & prefetch RFOs that miss the L3 and the data is returned from local or remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63FC00122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand & prefetch RFOs that miss the L3 and the data is returned from remote dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=63B800122H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD Counts all demand & prefetch RFOs that miss the L3 and the data is returned from local dram. EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=604000122H
OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=DEMAND_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0001H
OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=DEMAND_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0002H
OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=DEMAND_CODE_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0004H
OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=PF_L2_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0010H
OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=PF_L2_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0020H
OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=PF_L3_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0080H
OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=PF_L3_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0100H
OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=PF_L1D_AND_SW: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0400H
OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=ALL_PF_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0490H
OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=ALL_PF_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0120H
OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=ALL_DATA_RD: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0491H
OFFCORE_RESPONSE:request=ALL_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD OFFCORE_RESPONSE:request=ALL_RFO: response=L3_HIT.SNOOP_HIT_WITH_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C0122H
OFFCORE_RESPONSE:request=ALL_READS: response=L3_HIT.HIT_OTHER_CORE_FWD OFFCORE_RESPONSE:request=ALL_READS: response=L3_HIT.HIT_OTHER_CORE_FWD EventSel={B7H,BBH} UMask=01H MSR_OFFCORE_RSPx{1A6H,1A7H}=8003C07F7H